datasheet vcxo and set-top clock source mk2771-16 idt? vcxo and set-top clock source 1 mk2771-16 rev g 051310 description the mk2771-16 is a low-cost, low-jitter, high-performance vcxo and clock synthesizer designed for set-top boxes. the on-chip voltage controlled crystal oscillator accepts a 0 to 3 v input voltage to cause the output clocks to vary by 100 ppm. using idt?s patented vcxo and analog phase-locked loop (pll) techniques, the device uses an inexpensive 13.5 mhz pullable crystal input to produce multiple output clocks including two selectable processor clocks, a selectable audio clock, two communications clocks, a 13.5 mhz clock, and three 27 mhz clocks. all clocks are frequency locked to the 27 mhz output (and to each other) with zero ppm error, so any output can be used as the vcxo output. features ? packaged in 28-pin qsop ? rohs 5 (green) or rohs 6 (green and lead free) compliant package ? on-chip patented vcxo with pull range of 200 ppm ? vcxo tuning voltage of 0 to 3 v ? processor frequencies include 16.66, 20, 25, 32, 40, and 50 mhz ? audio clocks support 32 khz, 44.1 khz, 48 khz, and 96 khz sampling rates ? zero ppm synthesis error in all clocks (all exactly track 27 mhz vcxo) ? uses an inexpensive 13.5 mhz pullable crystal ? full cmos output swings with 25 ma output drive capability at ttl levels ? advanced, low-power, sub-micron cmos process ? 5 v operating voltage with 3.3 v capable i/o block diagram aclk voltage controlled crystal oscillator x1 x2 13.5 mhz pullable crystal 27.000 mhz pclk pll clock synthesis circuitry 13.500 mhz cclk2 cclk1 vddio gnd vdd5 vin cs1, cs0 ps1, ps0 as2:0 3 x2 pll divide by 2 2 3 2 optional crystal capacitors. 3 6
mk2771-16 vcxo and set-top clock source vcxo and synthesizer idt? vcxo and set-top clock source 2 mk2771-16 rev g 051310 pin assignment processor clock select table (mhz) audio clock table (mhz) communications clock table (mhz) 0 = connect directly to ground 1 = connect directly to vddio m = leave floating or unconnected 18 7 17 8 16 9 15 vddio 10 vdd5 11 cs1 12 as2 13 gnd 14 gnd gnd gnd 27m pclk cclk1 13.5m cclk2 ps1 22 21 20 19 aclk vdd5 5 6 vdd5 vin 27m 24 23 gnd 3 4 gnd x1 27m 26 25 cs0 1 2 ps0 x2 as0 28 27 as1 28-pin qsop ps1 ps0 pclk 00 50 0 1 16.667 m0 25 m1 32 10 40 11 20 as2 as1 as0 aclk 000 8.192 0 0 1 11.2896 0 1 0 12.288 0 1 1 5.6448 1 0 0 18.432 1 0 1 16.9344 1 1 0 49.152 1 1 1 21.576 cs1 cs0 cclk1 cclk2 0 0 low 33.333 0 1 low 24.576 1 0 11.0592 18.432 1 1 11.0592 3.6864
mk2771-16 vcxo and set-top clock source vcxo and synthesizer idt? vcxo and set-top clock source 3 mk2771-16 rev g 051310 pin descriptions pin number pin name pin type pin description 1 ps0 input processor clock select 0. selects pclk frequency. see table above. internal pull-up resistor. 2 x2 xo crystal connection. connect to a 13.5 mhz fundamental mode pullable crystal. 3, 10, 11 gnd power connect to ground. 4 x1 xi crystal connection. connect to a 13.5 mhz fundamental mode pullable crystal. 5, 8, 22 vdd5 power connect to +5 v. 6 vin input voltage input to vcxo. zero to 3 v signal which controls the frequency of the vcxo. 7 vddio power connect to +3.3 v or +5 v. amplitude of inpu ts and outputs will match this. 9 cs1 input communications clock select pin 1. selects cclk 1 and 2 per table above. internal pull-up. 12 pclk output processor clock output. determined by status of ps1, ps0. 13 cclk2 output communications clock output 2 determined by status of cs1, cs0 per table above. 14 aclk output audio clock output. determined by status of as2:0 per table above. 15 13.5m output 13.5 mhz vcxo clock output. 16 ps1 tri-level input processor clock select 1. selects pclk frequency. see table above. self-biased to m. 17 cclk1 output communications clock output 1 determined by status of cs1, cs0 per table above. 18, 23, 25 27m output 27 mhz vcxo clock output. 19, 20, 24 gnd power connect to ground. 21 as2 input audio clock select 2. selects aclk on pin 14. see table above. internal pull-up resistor. 26 cs0 input communications clock select pin 0. selects cclk 1 and 2 per table above. internal pull-up. 27 as0 input audio clock select 0. selects aclk on pin 14. see table above. internal pull-up resistor. 28 as1 input audio clock select 1. selects aclk on pin 14. see table above. internal pull-up resistor.
mk2771-16 vcxo and set-top clock source vcxo and synthesizer idt? vcxo and set-top clock source 4 mk2771-16 rev g 051310 absolute maximum ratings stresses above the ratings listed below can cause permanent damage to the mk2771-16. these ratings, which are standard values for idt commercially rated parts, are stress ratings only. functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for exte nded periods can affect product reliability. electrical parameters are guaranteed only over the recommended operating temperature range. dc electrical characteristics unless stated otherwise, vdd = 5 v 5% , ambient temperature 0 to +70 c item rating supply voltage, vdd (referenced to gnd) 7 v inputs and clock outputs (referenced to gnd) -0.5 v to vdd+0.5 v ambient operating temperature 0 to +70 c storage temperature -65 to +150 c junction temperature 125 c soldering temperature 260 c parameter symbol conditions min. typ. max. units operating voltage vdd 4.75 5.25 v operating voltage vddio all inputs/outputs 3.00 5.25 v input high voltage, x1 pin only v ih 3.5 2.5 v input low voltage, x1 pin only v il 2.5 1.5 v input high voltage (except ps1) v ih 2v input low voltage (except ps1) v il 0.8 v input high voltage (ps1 only) v ih vdd-0.5 v input low voltage (ps1 only) v il 0.5 v output high voltage v oh i oh = -25 ma 2.4 v output low voltage v ol i ol = 25 ma ? ? 0.4 v output high voltage, cmos level v oh i oh = -8 ma vdd-0.4 v operating supply current idd5 no load, note 1 42 ma operating supply current iddio no load, vddio = 3.3 v 19 ma short circuit current i os each output 100 ma input capacitance, except x1 c in except x1, x2 7 pf frequency synthesis error all clocks 0 ppm vin, vcxo control voltage 0 3 v
mk2771-16 vcxo and set-top clock source vcxo and synthesizer idt? vcxo and set-top clock source 5 mk2771-16 rev g 051310 ac electrical characteristics unless stated otherwise, vdd = 5 v5% , ambient temperature 0 to +70 c note 1: with all clocks at highest frequencies. note 2: with a pullable crystal that conforms to idt?s specifications. pullable crystal specifications frequency 13.500000 mhz correlation (load) capacitance 14 pf c0/c1 240 max. esr 25 ? max. operating temperature 0 to 70c initial accuracy 20 ppm temperature plus aging stability 50 ppm external components the mk2771-16 requires a minimum number of external components for proper operation. use a low inductance ground plane, connect all gnds to this. connect 0.01f decoupling caps on pins 5, 7, 8 and 22 directly to the ground plane, as close to the mk2771-16 as possible. a series termination resistor of 33 ? may be used for each clock output.the 13.500 mhz crystal must be connected as close to the chip as possible. the crystal should be a parallel mode, pullable, with load capacitance of 14 pf. consult idt full specifications. please obey application note man05 for pullable crystal layout info except for t he following: the mk2771-16 introduces a gnd pin (pin #3) between the pullable crystal pins. this ground should be brought in straight from the right side underneath the device. parameter symbol conditions min. typ. max. units crystal input frequency 13.5 mhz output clock rise time t or 0.8 to 2.0 v 1.5 ns output clock fall time t of 2.0 to 0.8 v 1.5 ns output clock duty cycle t od at 1.4 v 40 60 % maximum absolute jitter, short term t ja 300 ps 27 mhz output pullability 0v < vin < 3 v, note 3 100 140 ppm
mk2771-16 vcxo and set-top clock source vcxo and synthesizer idt? vcxo and set-top clock source 6 mk2771-16 rev g 051310 package outline and package dimensions (28-pin qsop) package dimensions are kept current with jedec publication no. 95 ordering information "lf" suffix to the part number are the pb -free configuration and are rohs compliant. while the information presented herein has been checked for both accuracy and reliability, integrated device technology (idt) a ssumes no responsibility for either its use or for the infringement of any paten ts or other rights of third parties, which would resul t from its use. no other circuits, patents, or licenses are im plied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliab ility, or other extraordinary environmental requirements are not recommended without additional processing by idt. idt reserves th e right to change any circuitry or specifications without noti ce. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments. part / order number marking shipping packaging package temperature MK2771-16Rlf MK2771-16Rlf tubes 28-pin ssop 0 to +70 c MK2771-16Rlftr MK2771-16Rlf tape and reel 28-pin ssop 0 to +70 c index area 1 2 28 d e1 e seating plane a1 a a2 e - c - b aaa c c l *for reference only. cont rolling dimensions in mm. millimeters inches* symbol min max min max a 1.35 1.75 0.053 0.069 a1 0.10 0.25 0.004 0.010 a2 -- 1.50 -- .059 b 0.20 0.30 0.008 0.012 c 0.18 0.25 0.007 0.010 d 9.80 10.00 0.386 0.394 e 5.80 6.20 0.228 0.244 e1 3.80 4.00 0.150 0.157 e 0.635 basic 0.025 basic l 0.40 1.27 0.016 0.050 0 8 0 8
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